Expand description
Define missing RISC-V pseudo instructions using assembly macros.
The RISC-V spec includes numerous pseudo instructions to help with writing RISC-V assembly. However, somewhat bafflingly, there are no pseudo instructions for making operations XLEN bits long. This makes it difficult to write general assembly code that works on both RV32 and RV64 systems, where the assembly only needs to operate on different XLENs.
xlen_macros! defines macros lx and sx, which function as
pseudoinstructions for loading and storing XLEN-sized values.