Enum PlicIrqId

#[repr(u32)]
pub enum PlicIrqId {
    None = 0,
    Uart0TxWatermark = 1,
    Uart0RxWatermark = 2,
    Uart0TxEmpty = 3,
    Uart0RxOverflow = 4,
    Uart0RxFrameErr = 5,
    Uart0RxBreakErr = 6,
    Uart0RxTimeout = 7,
    Uart0RxParityErr = 8,
    Uart1TxWatermark = 9,
    Uart1RxWatermark = 10,
    Uart1TxEmpty = 11,
    Uart1RxOverflow = 12,
    Uart1RxFrameErr = 13,
    Uart1RxBreakErr = 14,
    Uart1RxTimeout = 15,
    Uart1RxParityErr = 16,
    Uart2TxWatermark = 17,
    Uart2RxWatermark = 18,
    Uart2TxEmpty = 19,
    Uart2RxOverflow = 20,
    Uart2RxFrameErr = 21,
    Uart2RxBreakErr = 22,
    Uart2RxTimeout = 23,
    Uart2RxParityErr = 24,
    Uart3TxWatermark = 25,
    Uart3RxWatermark = 26,
    Uart3TxEmpty = 27,
    Uart3RxOverflow = 28,
    Uart3RxFrameErr = 29,
    Uart3RxBreakErr = 30,
    Uart3RxTimeout = 31,
    Uart3RxParityErr = 32,
    GpioGpio0 = 33,
    GpioGpio1 = 34,
    GpioGpio2 = 35,
    GpioGpio3 = 36,
    GpioGpio4 = 37,
    GpioGpio5 = 38,
    GpioGpio6 = 39,
    GpioGpio7 = 40,
    GpioGpio8 = 41,
    GpioGpio9 = 42,
    GpioGpio10 = 43,
    GpioGpio11 = 44,
    GpioGpio12 = 45,
    GpioGpio13 = 46,
    GpioGpio14 = 47,
    GpioGpio15 = 48,
    GpioGpio16 = 49,
    GpioGpio17 = 50,
    GpioGpio18 = 51,
    GpioGpio19 = 52,
    GpioGpio20 = 53,
    GpioGpio21 = 54,
    GpioGpio22 = 55,
    GpioGpio23 = 56,
    GpioGpio24 = 57,
    GpioGpio25 = 58,
    GpioGpio26 = 59,
    GpioGpio27 = 60,
    GpioGpio28 = 61,
    GpioGpio29 = 62,
    GpioGpio30 = 63,
    GpioGpio31 = 64,
    SpiDeviceGenericRxFull = 65,
    SpiDeviceGenericRxWatermark = 66,
    SpiDeviceGenericTxWatermark = 67,
    SpiDeviceGenericRxError = 68,
    SpiDeviceGenericRxOverflow = 69,
    SpiDeviceGenericTxUnderflow = 70,
    SpiDeviceUploadCmdfifoNotEmpty = 71,
    SpiDeviceUploadPayloadNotEmpty = 72,
    SpiDeviceUploadPayloadOverflow = 73,
    SpiDeviceReadbufWatermark = 74,
    SpiDeviceReadbufFlip = 75,
    SpiDeviceTpmHeaderNotEmpty = 76,
    I2c0FmtThreshold = 77,
    I2c0RxThreshold = 78,
    I2c0FmtOverflow = 79,
    I2c0RxOverflow = 80,
    I2c0Nak = 81,
    I2c0SclInterference = 82,
    I2c0SdaInterference = 83,
    I2c0StretchTimeout = 84,
    I2c0SdaUnstable = 85,
    I2c0CmdComplete = 86,
    I2c0TxStretch = 87,
    I2c0TxOverflow = 88,
    I2c0AcqFull = 89,
    I2c0UnexpStop = 90,
    I2c0HostTimeout = 91,
    I2c1FmtThreshold = 92,
    I2c1RxThreshold = 93,
    I2c1FmtOverflow = 94,
    I2c1RxOverflow = 95,
    I2c1Nak = 96,
    I2c1SclInterference = 97,
    I2c1SdaInterference = 98,
    I2c1StretchTimeout = 99,
    I2c1SdaUnstable = 100,
    I2c1CmdComplete = 101,
    I2c1TxStretch = 102,
    I2c1TxOverflow = 103,
    I2c1AcqFull = 104,
    I2c1UnexpStop = 105,
    I2c1HostTimeout = 106,
    I2c2FmtThreshold = 107,
    I2c2RxThreshold = 108,
    I2c2FmtOverflow = 109,
    I2c2RxOverflow = 110,
    I2c2Nak = 111,
    I2c2SclInterference = 112,
    I2c2SdaInterference = 113,
    I2c2StretchTimeout = 114,
    I2c2SdaUnstable = 115,
    I2c2CmdComplete = 116,
    I2c2TxStretch = 117,
    I2c2TxOverflow = 118,
    I2c2AcqFull = 119,
    I2c2UnexpStop = 120,
    I2c2HostTimeout = 121,
    PattgenDoneCh0 = 122,
    PattgenDoneCh1 = 123,
    RvTimerTimerExpiredHart0Timer0 = 124,
    OtpCtrlOtpOperationDone = 125,
    OtpCtrlOtpError = 126,
    AlertHandlerClassa = 127,
    AlertHandlerClassb = 128,
    AlertHandlerClassc = 129,
    AlertHandlerClassd = 130,
    SpiHost0Error = 131,
    SpiHost0SpiEvent = 132,
    SpiHost1Error = 133,
    SpiHost1SpiEvent = 134,
    UsbdevPktReceived = 135,
    UsbdevPktSent = 136,
    UsbdevDisconnected = 137,
    UsbdevHostLost = 138,
    UsbdevLinkReset = 139,
    UsbdevLinkSuspend = 140,
    UsbdevLinkResume = 141,
    UsbdevAvEmpty = 142,
    UsbdevRxFull = 143,
    UsbdevAvOverflow = 144,
    UsbdevLinkInErr = 145,
    UsbdevRxCrcErr = 146,
    UsbdevRxPidErr = 147,
    UsbdevRxBitstuffErr = 148,
    UsbdevFrame = 149,
    UsbdevPowered = 150,
    UsbdevLinkOutErr = 151,
    PwrmgrAonWakeup = 152,
    SysrstCtrlAonEventDetected = 153,
    AdcCtrlAonMatchDone = 154,
    AonTimerAonWkupTimerExpired = 155,
    AonTimerAonWdogTimerBark = 156,
    SensorCtrlIoStatusChange = 157,
    SensorCtrlInitStatusChange = 158,
    FlashCtrlProgEmpty = 159,
    FlashCtrlProgLvl = 160,
    FlashCtrlRdFull = 161,
    FlashCtrlRdLvl = 162,
    FlashCtrlOpDone = 163,
    FlashCtrlCorrErr = 164,
    HmacHmacDone = 165,
    HmacFifoEmpty = 166,
    HmacHmacErr = 167,
    KmacKmacDone = 168,
    KmacFifoEmpty = 169,
    KmacKmacErr = 170,
    OtbnDone = 171,
    KeymgrOpDone = 172,
    CsrngCsCmdReqDone = 173,
    CsrngCsEntropyReq = 174,
    CsrngCsHwInstExc = 175,
    CsrngCsFatalErr = 176,
    EntropySrcEsEntropyValid = 177,
    EntropySrcEsHealthTestFailed = 178,
    EntropySrcEsObserveFifoReady = 179,
    EntropySrcEsFatalErr = 180,
    Edn0EdnCmdReqDone = 181,
    Edn0EdnFatalErr = 182,
    Edn1EdnCmdReqDone = 183,
    Edn1EdnFatalErr = 184,
}

PLIC Interrupt Source.

Enumeration of all PLIC interrupt sources. The interrupt sources belonging to the same peripheral are guaranteed to be consecutive.

Variants

None = 0

No Interrupt

Uart0TxWatermark = 1

uart0_tx_watermark

Uart0RxWatermark = 2

uart0_rx_watermark

Uart0TxEmpty = 3

uart0_tx_empty

Uart0RxOverflow = 4

uart0_rx_overflow

Uart0RxFrameErr = 5

uart0_rx_frame_err

Uart0RxBreakErr = 6

uart0_rx_break_err

Uart0RxTimeout = 7

uart0_rx_timeout

Uart0RxParityErr = 8

uart0_rx_parity_err

Uart1TxWatermark = 9

uart1_tx_watermark

Uart1RxWatermark = 10

uart1_rx_watermark

Uart1TxEmpty = 11

uart1_tx_empty

Uart1RxOverflow = 12

uart1_rx_overflow

Uart1RxFrameErr = 13

uart1_rx_frame_err

Uart1RxBreakErr = 14

uart1_rx_break_err

Uart1RxTimeout = 15

uart1_rx_timeout

Uart1RxParityErr = 16

uart1_rx_parity_err

Uart2TxWatermark = 17

uart2_tx_watermark

Uart2RxWatermark = 18

uart2_rx_watermark

Uart2TxEmpty = 19

uart2_tx_empty

Uart2RxOverflow = 20

uart2_rx_overflow

Uart2RxFrameErr = 21

uart2_rx_frame_err

Uart2RxBreakErr = 22

uart2_rx_break_err

Uart2RxTimeout = 23

uart2_rx_timeout

Uart2RxParityErr = 24

uart2_rx_parity_err

Uart3TxWatermark = 25

uart3_tx_watermark

Uart3RxWatermark = 26

uart3_rx_watermark

Uart3TxEmpty = 27

uart3_tx_empty

Uart3RxOverflow = 28

uart3_rx_overflow

Uart3RxFrameErr = 29

uart3_rx_frame_err

Uart3RxBreakErr = 30

uart3_rx_break_err

Uart3RxTimeout = 31

uart3_rx_timeout

Uart3RxParityErr = 32

uart3_rx_parity_err

GpioGpio0 = 33

gpio_gpio 0

GpioGpio1 = 34

gpio_gpio 1

GpioGpio2 = 35

gpio_gpio 2

GpioGpio3 = 36

gpio_gpio 3

GpioGpio4 = 37

gpio_gpio 4

GpioGpio5 = 38

gpio_gpio 5

GpioGpio6 = 39

gpio_gpio 6

GpioGpio7 = 40

gpio_gpio 7

GpioGpio8 = 41

gpio_gpio 8

GpioGpio9 = 42

gpio_gpio 9

GpioGpio10 = 43

gpio_gpio 10

GpioGpio11 = 44

gpio_gpio 11

GpioGpio12 = 45

gpio_gpio 12

GpioGpio13 = 46

gpio_gpio 13

GpioGpio14 = 47

gpio_gpio 14

GpioGpio15 = 48

gpio_gpio 15

GpioGpio16 = 49

gpio_gpio 16

GpioGpio17 = 50

gpio_gpio 17

GpioGpio18 = 51

gpio_gpio 18

GpioGpio19 = 52

gpio_gpio 19

GpioGpio20 = 53

gpio_gpio 20

GpioGpio21 = 54

gpio_gpio 21

GpioGpio22 = 55

gpio_gpio 22

GpioGpio23 = 56

gpio_gpio 23

GpioGpio24 = 57

gpio_gpio 24

GpioGpio25 = 58

gpio_gpio 25

GpioGpio26 = 59

gpio_gpio 26

GpioGpio27 = 60

gpio_gpio 27

GpioGpio28 = 61

gpio_gpio 28

GpioGpio29 = 62

gpio_gpio 29

GpioGpio30 = 63

gpio_gpio 30

GpioGpio31 = 64

gpio_gpio 31

SpiDeviceGenericRxFull = 65

spi_device_generic_rx_full

SpiDeviceGenericRxWatermark = 66

spi_device_generic_rx_watermark

SpiDeviceGenericTxWatermark = 67

spi_device_generic_tx_watermark

SpiDeviceGenericRxError = 68

spi_device_generic_rx_error

SpiDeviceGenericRxOverflow = 69

spi_device_generic_rx_overflow

SpiDeviceGenericTxUnderflow = 70

spi_device_generic_tx_underflow

SpiDeviceUploadCmdfifoNotEmpty = 71

spi_device_upload_cmdfifo_not_empty

SpiDeviceUploadPayloadNotEmpty = 72

spi_device_upload_payload_not_empty

SpiDeviceUploadPayloadOverflow = 73

spi_device_upload_payload_overflow

SpiDeviceReadbufWatermark = 74

spi_device_readbuf_watermark

SpiDeviceReadbufFlip = 75

spi_device_readbuf_flip

SpiDeviceTpmHeaderNotEmpty = 76

spi_device_tpm_header_not_empty

I2c0FmtThreshold = 77

i2c0_fmt_threshold

I2c0RxThreshold = 78

i2c0_rx_threshold

I2c0FmtOverflow = 79

i2c0_fmt_overflow

I2c0RxOverflow = 80

i2c0_rx_overflow

I2c0Nak = 81

i2c0_nak

I2c0SclInterference = 82

i2c0_scl_interference

I2c0SdaInterference = 83

i2c0_sda_interference

I2c0StretchTimeout = 84

i2c0_stretch_timeout

I2c0SdaUnstable = 85

i2c0_sda_unstable

I2c0CmdComplete = 86

i2c0_cmd_complete

I2c0TxStretch = 87

i2c0_tx_stretch

I2c0TxOverflow = 88

i2c0_tx_overflow

I2c0AcqFull = 89

i2c0_acq_full

I2c0UnexpStop = 90

i2c0_unexp_stop

I2c0HostTimeout = 91

i2c0_host_timeout

I2c1FmtThreshold = 92

i2c1_fmt_threshold

I2c1RxThreshold = 93

i2c1_rx_threshold

I2c1FmtOverflow = 94

i2c1_fmt_overflow

I2c1RxOverflow = 95

i2c1_rx_overflow

I2c1Nak = 96

i2c1_nak

I2c1SclInterference = 97

i2c1_scl_interference

I2c1SdaInterference = 98

i2c1_sda_interference

I2c1StretchTimeout = 99

i2c1_stretch_timeout

I2c1SdaUnstable = 100

i2c1_sda_unstable

I2c1CmdComplete = 101

i2c1_cmd_complete

I2c1TxStretch = 102

i2c1_tx_stretch

I2c1TxOverflow = 103

i2c1_tx_overflow

I2c1AcqFull = 104

i2c1_acq_full

I2c1UnexpStop = 105

i2c1_unexp_stop

I2c1HostTimeout = 106

i2c1_host_timeout

I2c2FmtThreshold = 107

i2c2_fmt_threshold

I2c2RxThreshold = 108

i2c2_rx_threshold

I2c2FmtOverflow = 109

i2c2_fmt_overflow

I2c2RxOverflow = 110

i2c2_rx_overflow

I2c2Nak = 111

i2c2_nak

I2c2SclInterference = 112

i2c2_scl_interference

I2c2SdaInterference = 113

i2c2_sda_interference

I2c2StretchTimeout = 114

i2c2_stretch_timeout

I2c2SdaUnstable = 115

i2c2_sda_unstable

I2c2CmdComplete = 116

i2c2_cmd_complete

I2c2TxStretch = 117

i2c2_tx_stretch

I2c2TxOverflow = 118

i2c2_tx_overflow

I2c2AcqFull = 119

i2c2_acq_full

I2c2UnexpStop = 120

i2c2_unexp_stop

I2c2HostTimeout = 121

i2c2_host_timeout

PattgenDoneCh0 = 122

pattgen_done_ch0

PattgenDoneCh1 = 123

pattgen_done_ch1

RvTimerTimerExpiredHart0Timer0 = 124

rv_timer_timer_expired_hart0_timer0

OtpCtrlOtpOperationDone = 125

otp_ctrl_otp_operation_done

OtpCtrlOtpError = 126

otp_ctrl_otp_error

AlertHandlerClassa = 127

alert_handler_classa

AlertHandlerClassb = 128

alert_handler_classb

AlertHandlerClassc = 129

alert_handler_classc

AlertHandlerClassd = 130

alert_handler_classd

SpiHost0Error = 131

spi_host0_error

SpiHost0SpiEvent = 132

spi_host0_spi_event

SpiHost1Error = 133

spi_host1_error

SpiHost1SpiEvent = 134

spi_host1_spi_event

UsbdevPktReceived = 135

usbdev_pkt_received

UsbdevPktSent = 136

usbdev_pkt_sent

UsbdevDisconnected = 137

usbdev_disconnected

UsbdevHostLost = 138

usbdev_host_lost

UsbdevLinkReset = 139

usbdev_link_reset

UsbdevLinkSuspend = 140

usbdev_link_suspend

UsbdevLinkResume = 141

usbdev_link_resume

UsbdevAvEmpty = 142

usbdev_av_empty

UsbdevRxFull = 143

usbdev_rx_full

UsbdevAvOverflow = 144

usbdev_av_overflow

UsbdevLinkInErr = 145

usbdev_link_in_err

UsbdevRxCrcErr = 146

usbdev_rx_crc_err

UsbdevRxPidErr = 147

usbdev_rx_pid_err

UsbdevRxBitstuffErr = 148

usbdev_rx_bitstuff_err

UsbdevFrame = 149

usbdev_frame

UsbdevPowered = 150

usbdev_powered

UsbdevLinkOutErr = 151

usbdev_link_out_err

PwrmgrAonWakeup = 152

pwrmgr_aon_wakeup

SysrstCtrlAonEventDetected = 153

sysrst_ctrl_aon_event_detected

AdcCtrlAonMatchDone = 154

adc_ctrl_aon_match_done

AonTimerAonWkupTimerExpired = 155

aon_timer_aon_wkup_timer_expired

AonTimerAonWdogTimerBark = 156

aon_timer_aon_wdog_timer_bark

SensorCtrlIoStatusChange = 157

sensor_ctrl_io_status_change

SensorCtrlInitStatusChange = 158

sensor_ctrl_init_status_change

FlashCtrlProgEmpty = 159

flash_ctrl_prog_empty

FlashCtrlProgLvl = 160

flash_ctrl_prog_lvl

FlashCtrlRdFull = 161

flash_ctrl_rd_full

FlashCtrlRdLvl = 162

flash_ctrl_rd_lvl

FlashCtrlOpDone = 163

flash_ctrl_op_done

FlashCtrlCorrErr = 164

flash_ctrl_corr_err

HmacHmacDone = 165

hmac_hmac_done

HmacFifoEmpty = 166

hmac_fifo_empty

HmacHmacErr = 167

hmac_hmac_err

KmacKmacDone = 168

kmac_kmac_done

KmacFifoEmpty = 169

kmac_fifo_empty

KmacKmacErr = 170

kmac_kmac_err

OtbnDone = 171

otbn_done

KeymgrOpDone = 172

keymgr_op_done

CsrngCsCmdReqDone = 173

csrng_cs_cmd_req_done

CsrngCsEntropyReq = 174

csrng_cs_entropy_req

CsrngCsHwInstExc = 175

csrng_cs_hw_inst_exc

CsrngCsFatalErr = 176

csrng_cs_fatal_err

EntropySrcEsEntropyValid = 177

entropy_src_es_entropy_valid

EntropySrcEsHealthTestFailed = 178

entropy_src_es_health_test_failed

EntropySrcEsObserveFifoReady = 179

entropy_src_es_observe_fifo_ready

EntropySrcEsFatalErr = 180

entropy_src_es_fatal_err

Edn0EdnCmdReqDone = 181

edn0_edn_cmd_req_done

Edn0EdnFatalErr = 182

edn0_edn_fatal_err

Edn1EdnCmdReqDone = 183

edn1_edn_cmd_req_done

Edn1EdnFatalErr = 184

edn1_edn_fatal_err

Trait Implementations

impl Clone for PlicIrqId

fn clone(&self) -> PlicIrqId

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for PlicIrqId

fn eq(&self, other: &PlicIrqId) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl TryFrom<u32> for PlicIrqId

type Error = u32

The type returned in the event of a conversion error.

fn try_from(val: u32) -> Result<Self, Self::Error>

Performs the conversion.

impl Copy for PlicIrqId

impl Eq for PlicIrqId

impl StructuralPartialEq for PlicIrqId