rp2040/
lib.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5#![no_std]
6
7pub mod adc;
8pub mod chip;
9pub mod clocks;
10mod deferred_calls;
11pub mod dma;
12pub mod gpio;
13pub mod i2c;
14pub mod interrupts;
15pub mod pio;
16pub mod pio_gspi;
17pub mod pio_pwm;
18pub mod pio_spi;
19pub mod pwm;
20pub mod resets;
21pub mod rtc;
22pub mod spi;
23pub mod sysinfo;
24pub mod test;
25pub mod timer;
26pub mod uart;
27pub mod usb;
28pub mod watchdog;
29pub mod xosc;
30
31use cortexm0p::{initialize_ram_jump_to_main, unhandled_interrupt, CortexM0P, CortexMVariant};
32
33extern "C" {
34    // _estack is not really a function, but it makes the types work
35    // You should never actually invoke it!!
36    fn _estack();
37}
38
39#[cfg_attr(
40    all(target_arch = "arm", target_os = "none"),
41    link_section = ".vectors"
42)]
43// used Ensures that the symbol is kept until the final binary
44#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
45pub static BASE_VECTORS: [unsafe extern "C" fn(); 16] = [
46    _estack,
47    initialize_ram_jump_to_main,
48    unhandled_interrupt,           // NMI
49    CortexM0P::HARD_FAULT_HANDLER, // Hard Fault
50    unhandled_interrupt,           // MemManage
51    unhandled_interrupt,           // BusFault
52    unhandled_interrupt,           // UsageFault
53    unhandled_interrupt,
54    unhandled_interrupt,
55    unhandled_interrupt,
56    unhandled_interrupt,
57    CortexM0P::SVC_HANDLER, // SVC
58    unhandled_interrupt,    // DebugMon
59    unhandled_interrupt,
60    unhandled_interrupt,        // PendSV
61    CortexM0P::SYSTICK_HANDLER, // SysTick
62];
63
64// RP2040 has total of 26 interrupts, but the SDK declares 32 as 26 - 32 might be manually handled
65#[cfg_attr(all(target_arch = "arm", target_os = "none"), link_section = ".irqs")]
66// used Ensures that the symbol is kept until the final binary
67#[cfg_attr(all(target_arch = "arm", target_os = "none"), used)]
68pub static IRQS: [unsafe extern "C" fn(); 32] = [
69    CortexM0P::GENERIC_ISR, // TIMER0 (0)
70    CortexM0P::GENERIC_ISR, // TIMER1 (1)
71    CortexM0P::GENERIC_ISR, // TIMER2 (2)
72    CortexM0P::GENERIC_ISR, // TIMER3 (3)
73    CortexM0P::GENERIC_ISR, // PWM WRAP (4)
74    CortexM0P::GENERIC_ISR, // USB (5)
75    CortexM0P::GENERIC_ISR, // XIP (6)
76    CortexM0P::GENERIC_ISR, // PIO0 INT0  (7)
77    CortexM0P::GENERIC_ISR, // PIO0 INT1 (8)
78    CortexM0P::GENERIC_ISR, // PIO1 INT0 (9)
79    CortexM0P::GENERIC_ISR, // PIO1 INT1 (10)
80    CortexM0P::GENERIC_ISR, // DMA0 (11)
81    CortexM0P::GENERIC_ISR, // DMA1 (12)
82    CortexM0P::GENERIC_ISR, // IO BANK 0 (13)
83    CortexM0P::GENERIC_ISR, // IO QSPI (14)
84    CortexM0P::GENERIC_ISR, // SIO PROC 0 (15)
85    CortexM0P::GENERIC_ISR, // SIO PROC 1 (16)
86    CortexM0P::GENERIC_ISR, // CLOCKS (17)
87    CortexM0P::GENERIC_ISR, // SPI 0 (18)
88    CortexM0P::GENERIC_ISR, // SPI 1 (19)
89    CortexM0P::GENERIC_ISR, // UART 0 (20)
90    CortexM0P::GENERIC_ISR, // UART 1 (21)
91    CortexM0P::GENERIC_ISR, // ADC FIFO (22)
92    CortexM0P::GENERIC_ISR, // I2C 0 (23)
93    CortexM0P::GENERIC_ISR, // I2C 1 (24)
94    CortexM0P::GENERIC_ISR, // RTC (25)
95    unhandled_interrupt,    // (26)
96    unhandled_interrupt,    // (27)
97    unhandled_interrupt,    // (28)
98    unhandled_interrupt,    // (29)
99    unhandled_interrupt,    // (30)
100    unhandled_interrupt,    // (31)
101];
102
103extern "C" {
104    static mut _szero: usize;
105    static mut _ezero: usize;
106    static mut _etext: usize;
107    static mut _srelocate: usize;
108    static mut _erelocate: usize;
109}
110
111pub unsafe fn init() {
112    cortexm0p::nvic::disable_all();
113    cortexm0p::nvic::clear_all_pending();
114    let sio = gpio::SIO::new();
115    let processor = sio.get_processor();
116    match processor {
117        chip::Processor::Processor0 => {}
118        _ => panic!(
119            "Kernel should run only using processor 0 (now processor {})",
120            processor as u8
121        ),
122    }
123}