lpc55s6x/
interrupts.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2025.
4
5pub const WDT_BOD_FLASH: u32 = 0;
6pub const SDMA0: u32 = 1;
7pub const GPIO_GLOBALINT0: u32 = 2;
8pub const GPIO_GLOBALINT1: u32 = 3;
9pub const GPIO_INT0_IRQ0: u32 = 4;
10pub const GPIO_INT0_IRQ1: u32 = 5;
11pub const GPIO_INT0_IRQ2: u32 = 6;
12pub const GPIO_INT0_IRQ3: u32 = 7;
13pub const UTICK: u32 = 8;
14pub const MRT: u32 = 9;
15pub const CTIMER0: u32 = 10;
16pub const CTIMER1: u32 = 11;
17pub const SCT: u32 = 12;
18pub const CTIMER3: u32 = 13;
19pub const FLEXCOMM0: u32 = 14;
20pub const FLEXCOMM1: u32 = 15;
21pub const FLEXCOMM2: u32 = 16;
22pub const FLEXCOMM3: u32 = 17;
23pub const FLEXCOMM4: u32 = 18;
24pub const FLEXCOMM5: u32 = 19;
25pub const FLEXCOMM6: u32 = 20;
26pub const FLEXCOMM7: u32 = 21;
27pub const ADC: u32 = 22;
28pub const ACMP: u32 = 24;
29pub const USB0_NEEDCLK: u32 = 27;
30pub const USB0: u32 = 28;
31pub const RTC: u32 = 29;
32pub const WAKEUP_IRQN: u32 = 31;
33pub const GPIO_INT0_IRQ4: u32 = 32;
34pub const GPIO_INT0_IRQ5: u32 = 33;
35pub const GPIO_INT0_IRQ6: u32 = 34;
36pub const GPIO_INT0_IRQ7: u32 = 35;
37pub const CTIMER2: u32 = 36;
38pub const CTIMER4: u32 = 37;
39pub const OSEVTIMER: u32 = 38;
40pub const SDIO: u32 = 42;
41pub const USB1_PHY: u32 = 46;
42pub const USB1: u32 = 47;
43pub const USB1_NEEDCLK: u32 = 48;
44pub const HYPERVISOR: u32 = 49;
45pub const SGPIO_INT0_IRQ0: u32 = 50;
46pub const SGPIO_INT0_IRQ1: u32 = 51;
47pub const PLU: u32 = 52;
48pub const SEC_VIO: u32 = 53;
49pub const HASH: u32 = 54;
50pub const CASPER: u32 = 55;
51pub const PUF: u32 = 56;
52pub const PQ: u32 = 57;
53pub const SDMA1: u32 = 58;
54pub const HS_SPI: u32 = 56;
lpc55s6x/interrupts.rs

lpc55s6x/
interrupts.rs
