kernel/hil/
eic.rs

1// Licensed under the Apache License, Version 2.0 or the MIT License.
2// SPDX-License-Identifier: Apache-2.0 OR MIT
3// Copyright Tock Contributors 2022.
4
5//! Interface for external interrupt controller.
6//!
7//! The External Interrupt Controller (EIC) allows pins to be configured as
8//! external interrupts. Each external interrupt has its own interrupt request
9//! and can be individually masked. Each external interrupt can generate an
10//! interrupt on rising or falling edge, or high or low level.
11//! Every interrupt pin can also be configured to be asynchronous, in order to
12//! wake-up the part from sleep modes where the CLK_SYNC clock has been disabled.
13//!
14//! A basic use case:
15//! A user button is configured for falling edge trigger and async mode.
16
17/// Enum for selecting which edge to trigger interrupts on.
18#[derive(Debug)]
19pub enum InterruptMode {
20    RisingEdge,
21    FallingEdge,
22    HighLevel,
23    LowLevel,
24}
25
26/// Interface for EIC.
27pub trait ExternalInterruptController {
28    /// The chip-dependent type of an EIC line. Number of lines available depends on the chip.
29    type Line;
30
31    /// Enables external interrupt on the given 'line'
32    /// In asynchronous mode, all edge interrupts will be
33    /// interpreted as level interrupts and the filter is disabled.
34    fn line_enable(&self, line: &Self::Line, interrupt_mode: InterruptMode);
35
36    /// Disables external interrupt on the given 'line'
37    fn line_disable(&self, line: &Self::Line);
38}
39
40/// Interface for users of EIC. In order
41/// to execute interrupts, the user must implement
42/// this `Client` interface.
43pub trait Client {
44    /// Called when an interrupt occurs.
45    fn fired(&self);
46}
kernel/hil/eic.rs

kernel/hil/
eic.rs
